The History of Overclocking


Introduction – The First 15 Years

Overclocking may have only become a mainstream exercise is the last decade, but its roots can be traced back to the PC itself. While the methods used to overclock may have changed over the years, the goal has remained the same – to increase the performance of your computer. Much like modifying a car’s engine, overclocking can be done for one of two reasons. Either you can increase the performance of a cheap model to match that of a more expensive model, or you can shoot for performance greater than that of any off-the-shelf components.

How it Works

A clock speed is generated by a clock crystal known as a crystal oscillator, with the crystal being used usually being quartz. When an electric current is passed through the crystal, it produces a steady pulse of 14.318 MHz – this is called the system clock. It is not unique to computers and can be seen in televisions and clocks, amongst other things. However, to the computer this is a seemingly useless frequency as nothing runs at 14.318 MHz.

To combat this problem, a circuit is used to derive the speeds required. This circuit is known as a Phase-Locked Loop, or PLL. Several of these circuits can be seen in a single clock generator, which is a chip running alongside a nearby 14.318 MHz oscillator. The clock generator will then give off the required frequencies for the BCLK, PCI-Express bus (if it is not tied to the BCLK), PCI bus, RAM, and anything else which needs a clock speed.

The PLL allows us to change these speeds through a few components – a phase comparator, a Voltage Controlled Oscillator (VCO), and a down counter (divider). The phase comparator has two inputs, one for the reference clock speed of 14.318 MHz and the other for is a looped-back input for the frequency from the VCO. The phase comparator then compares the two frequencies and generates a voltage based on the difference. Should both values be the same, the output voltage will remain unchanged and the VCO will continue to oscillate at the current rate of 14.318 MHz – the same rate as the crystal oscillator.

In order to generate a faster clock speed, a divider is introduced after the VCO as it is looping back to the phase comparator. If a divider of two were to be used, the VCO would feed in 14.318 MHz to the divider which would result in an output of 7.159 MHz. This 7.159 MHz frequency is then fed back into the phase comparator which tricks it into thinking it is only operating at half the frequency it should. The phase comparator compensates for this by hitting the VCO with more voltage to get the output frequency doubled back up to 14.318 MHz.

The result of this trickery is an actual output of 28.636 MHz which is siphoned off and becomes the new output frequency for the system. The divider feeds 14.318 MHz back to the phase comparator, which assumes that the previous voltage output was correct. It then continues to output the same voltage, keeping the higher system speed.

The IBM XT computer ran at a clock speed of 4.77 MHz. We can see that reversing this process by introducing a multiplier into the system instead of a divider would result in a lower system speed. By using a multiplier of three, the phase comparator would be fed an input of 42.954 MHz from the VCO. It compensates for this, reducing the voltage until the VCO outputs just 4.773 MHz. This 4.773 MHz is once again fed through the multiplier which in turn reports the current frequency to the phase comparator as 14.318 MHz.

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